In a conventional gate drive circuit, a buffer circuit including transistors and/or MOSFETs connected in series has been generally used as a gate drive circuit for driving a MOSFET (metal-oxide-semiconductor field-effect transistor) that is a semiconductor switching element. This circuit applies a negative bias voltage to a reference potential of the buffer, whereby the gate voltage can be made negative when the MOSFET is off; therefore, the semiconductor switching element can be prevented from malfunctioning in switching (refer to Patent Document 1, for example).
Prior Art Document
Patent Document
Patent Document 1: Japanese Laid-Open Patent Publication No. H7-245557 (FIG. 1, Page 3)